(Invited) High Performance UTB GeOI nand pMOSFETs Featuring HEtero-Layer-Lift-Off (HELLO) Technology
In: ECS Transactions, Jg. 86 (2018-07-23), Heft 10
serialPeriodical
Zugriff:
Advanced HEtero-Layer-Lift-Off (HELLO) technology utilizing Ge/SiGe/Ge hetero-epitaxy technique was implemented to realize high quality ultrathin body (UTB) Ge-on-insulator (GeOI) structures. Top interfacial quality of GeOI has been taken care by plasma enhanced ALD-Al2O3 passivation. On the other hand, bottom interfacial quality of GeOI was improved by N2O plasma treatment or Si passivation for UTB GeOI nand pMOSFETs, respectively. Besides, GeOI body thickness (Tbody) was precisely controlled through SiGe etch stop layer and digital etching process. For lowering parasitic resistance of S/D regions of bulk Ge nand pMOSFETs, ion implantation after germanidation (IAG) has been demonstrated as an effective way. Moreover, high performance UTB GeOI nand pMOSFETs with Tbodyless than 5 nm have been successfully fabricated for the first time. Thickness dependence of carrier mobility of GeOI has also been investigated systematically through split-CV method, revealing a great potential of UTB GeOI structures in future Ge CMOS application.
Titel: |
(Invited) High Performance UTB GeOI nand pMOSFETs Featuring HEtero-Layer-Lift-Off (HELLO) Technology
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Autor/in / Beteiligte Person: | Chang, Wen Hsin ; Irisawa, Toshifumi ; Ishii, Hiroyuki ; Hattori, Hiroyuki ; Ota, Hiroyuki ; Takagi, Hideki ; Kurashima, Yuichi ; Uchida, Noriyuki ; Maeda, Tatsuro |
Zeitschrift: | ECS Transactions, Jg. 86 (2018-07-23), Heft 10 |
Veröffentlichung: | 2018 |
Medientyp: | serialPeriodical |
ISSN: | 1938-5862 (print) ; 1938-6737 (print) |
DOI: | 10.1149/08610.0025ecst |
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