Backside Si passivation: Leading to high performance UTB GeOI structures for monolithic 3D integrations
In: 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 2019-04-01
Online
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Zugriff:
Backside Si passivation for ultrathin boy (UTB) GeOI has been verified to suppress Coulomb scattering from Ge/buried oxide (BOX) interface. With improvement of backside interfacial quality, primary carrier scattering factors in GeOI channel have been effectively reduced, resulting in significant enhancement of hole mobility. The hole mobility improvement has been proved through device characterizations of UTB GeOI $p$ MOSFETs and Hall measurements. UTB GeOI platform formed by only low thermal budget processes is very promising for future Ge large scale integrated (LSI) circuits devices in monolithic 3D (M3D) integration scheme.
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Backside Si passivation: Leading to high performance UTB GeOI structures for monolithic 3D integrations
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Autor/in / Beteiligte Person: | Ishii, Hiroyuki ; Wen Hsin Chang ; Uchida, Noriyuki ; Maeda, Tatsuro ; Irisawa, Toshifumi |
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Zeitschrift: | 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 2019-04-01 |
Veröffentlichung: | IEEE, 2019 |
Medientyp: | unknown |
DOI: | 10.1109/vlsi-tsa.2019.8804696 |
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